Integrated circuits conventionally include a large number of identically formed components configured and assembled to form the various individual circuits constituting a particular integrated circuit. Only a limited variety of component types are needed and used to form the required circuits. Because all components of a particular type are commonly and simultaneously formed, the characteristics of all components of a particular type are uniform; there is little variation between components of a particular type.
Because all like type components are simultaneously formed, processing variations affect all such components equally, thereby minimizing differences in operating characteristics among components of a particular type. For example, all NPN transistors required to have a first predetermined threshold are simultaneously formed at different substrate locations, thereby minimizing variations in the operating characteristics of those NPN transistors.
One or more steps of the manufacturing process are altered to produce different types of components. While operating characteristics vary little among the same type of component, normal processing variations make it difficult to insure a consistent relationship between different types of components. For example, it is difficult to ensure a consistent relationship between the thresholds of two different types of transistors due to processing variations. These variations include slight differences in doping levels and diffusion depths caused by variations in annealing conditions.
FIG. 1 is a sectional view of a basic component of a conventional bipolar type of integrated circuit. Junction isolation is provided between components formed in the P-type substrate by forming the components in N-type wells.
The integrated circuit is formed on a single-crystal P-type silicon semiconductor substrate 1. In the conventional integrated circuit, a P-type first conductivity type semiconductor material and an opposite, N-type second conductivity semiconductor material form the NPN transistor shown. A corresponding PNP device can be formed by using an N-type first conductivity material and P-type second conductivity material.
As shown, an opposite conductivity N type layer is formed not always in the substrate, for example, by epitaxial growth. The N-type layer is divided into separate wells 2 by deep diffusion of a P-type impurity from the upper surface of the substrate at predetermined locations 3. Conventionally, the bottom of the well comprises a highly doped buried region 4 of the second N-type conductivity.
Well 2 constitutes a collector region of the NPN transistor, with a collector contact C formed on a surface of an over-doped region 6 of well 2. A P-type well region 7 is formed in well 2 by implanting or diffusing a P-type impurity through a surface region of substrate 1 laterally spaced from over-doped region 6. The P-type well region 7 constitutes a base region of the transistor with a base contact B formed on a surface of region 7. An N.sup.+ emitter region 8 is formed in P-type well region 7, laterally spaced from base contact B. An emitter metallization E is formed on a surface of emitter region 8.
The operating characteristics of the NPN transistor of FIG. 1 are determined by a combination of physical properties of the device including the impurity doping levels, junction depths and concentrations gradients of the emitter-base and base-collector junctions. In particular, the current gain and the breakdown voltage BV.sub.CEO are among the operating characteristics affected by the listed physical properties of the device.
Conventionally, the doping level of the base or emitter region of a device is varied to manufacture a second NPN transistor having a current gain different from that of the transistor shown in FIG. 1. However, because this second transistor is manufactured by different processing steps, the relative gain of the second transistor with respect to the first transistor among different manufacturing batches will not be consistent so that it is not possible to precisely obtain a predetermined ratio of transistor gains.
U.S. Pat. No. 3,770,519 assigned to IBM and UK Patent 1,502,122 assigned to RCA disclose NPN transistors having predetermined different physical properties to achieve corresponding different operating characteristics. In the IBM patent, a normal first transistor and a second transistor having a relatively very low current gain are formed in a common well. The very low gain transistor is operated as a diode with an anode connected to the base of the first transistor. However, the prior art fails to describe a composite transistor formed of two elementary interconnected transistors whereby the composite transistor has a predetermined gain relative to a conventional transistor formed in the same substrate.